The present invention relates to a control technique for taking a measure against an undesired power source cutoff in a semiconductor device or a mobile terminal, which is useful in application to e.g., a liquid crystal display driver.
In the event of cutoff of an action power source of a driving type semiconductor device such as a liquid crystal driver, it is necessary to initialize or stabilize the driving state of the semiconductor device directed toward the outside. For instance, a liquid crystal display driver executes a response process for coping with the cutoff of an action power source by causing pixels of a liquid crystal panel to release their own electric charges forming information, or comparable means; and the response process is intended to avoid undesired charges remaining on the pixels of the liquid crystal panel after the power source cutoff and leaving a residual image or a display speckle on the panel. As the requirement for starting the response process, the detection of a voltage reduction of a driving power source (VDD2) for driving a liquid crystal panel as described in e.g., the Japanese Unexamined Patent Application Publication No. JP-A-2011-170349 may be used. The process in response to the power source cutoff like that is controlled by a logic circuit working on a so-called logic voltage lower than a drive voltage. Further, in JP-A-2014-010231, an attempt to start the response process on detection of a voltage reduction of a logic power source is made in consideration of the fact that even if the attempt to start the response process is made based on a voltage reduction of a driving power source, the response process cannot be completed owing to the lowering of the logic power source in the middle of or before the voltage reduction of the driving power source. Still further, in JP-A-2014-202792, an attempt to start the response process is made in any of the event of a voltage reduction of the driving power source and the event of a voltage reduction of a logic power source. The means disclosed by JP-A-2014-202792 is arranged so that in the response process started owing to a voltage reduction of the logic power source, the voltage of the driving power source is lowered and used for the action power source of the logic circuit.
As described above, the patent documents JP-A-2011-170349, JP-A-2014-010231 and JP-A-2014-202792 have been considered prior to the invention hereof.